MC68HC05P18A Datasheet, PDF (93/130 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Analog-to-Digital (A/D) Converter
Digital Section
the beginning of the conversion cycle. The conversion process is
monotonic and has no missing codes.
11.5 Digital Section
The following paragraphs describe the operation and performance of
digital modules within the analog subsystem.
11.5.1 Conversion Times
Each input conversion requires 32 PH2 clock cycles, which must be at a
frequency equal to or greater than 1 MHz.
11.5.2 Internal versus External Oscillator
If the MCU PH2 clock frequency is less than 1 MHz (2 MHz external
oscillator), the internal RC oscillator (approximately 1.5 MHz) must be
used for the A/D converter clock. The internal RC clock is selected by
setting the EERC bit in the EEPROM program register (EEPROG).
NOTE: The RC oscillator is shared with the EEPROM module. The RC oscillator
is disabled while the MCU is in stop mode.
When the internal RC oscillator is being used, these limitations apply:
1. Since the internal RC oscillator is running asynchronously with
respect to the PH2 clock, the conversion complete (CC) bit in the
A/D status and control register (ADSC) must be used to determine
when a conversion sequence has been completed.
2. Electrical noise slightly degrades the accuracy of the A/D
converter. The A/D converter is synchronized to read voltages
during the quiet period of the clock driving it. Since the internal and
external clocks are not synchronized, the A/D converter
occasionally measures an input when the external clock is making
a transition.
3. If the PH2 clock is 1 MHz or greater (for example, external
oscillator 2 MHz or greater), the internal RC oscillator should be
turned off and the external oscillator used as the conversion clock.
MC68HC05P18A
Analog-to-Digital (A/D) Converter
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Technical Data