MC68HC05P18A Datasheet, PDF (42/130 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Interrupts
Freescale Semiconductor, Inc.
4.4 Interrupt Types
The interrupts fall into these three categories which are discussed here:
• Reset interrupt sequence
• Software interrupt (SWI)
• Hardware interrupts
4.4.1 Reset Interrupt Sequence
The reset function is not in the strictest sense an interrupt; however, it is
acted upon in a similar manner as shown in Figure 4-1. A low-level input
on the RESET pin or internally generated RST signal causes:
• The program to vector to its starting address, which is specified by
the contents of memory locations $3FFE and $3FFF
• The I bit in the condition code register (CCR) to be set
• The MCU to be configured to a known state as described in
Section 5. Resets.
4.4.2 Software Interrupt (SWI)
The SWI is an executable instruction. It is also a non-maskable interrupt
since it is executed regardless of the state of the I bit in the CCR. As with
any instruction, interrupts pending during the previous instruction are
serviced before the SWI opcode is fetched. The interrupt service routine
address for the SWI instruction is specified by the contents of memory
locations $3FFC and $3FFD.
Technical Data
Interrupts
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MC68HC05P18A