MC68HC05P18A Datasheet, PDF (80/130 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Input/Output Ports (SIOP)
be transmitted in either most-significant bit (MSB) first format or the
least-significant bit (LSB) format.
On the first falling edge of SCK, the first data bit will be shifted out to the
SDO pin. The remaining data bits will be shifted out to the SDI pin on
subsequent falling edges of SCK. The SDO pin will present valid data at
least 100 ns before the rising edge of the SCK and remain valid for
100 ns after the rising edge of SCK. See Figure 9-2.
9.4 SIOP Registers
The SIOP is programmed and controlled by these registers:
• SIOP control register (SCR) located at address $000A
• SIOP status register (SSR) located at address $000B
• SIOP data register (SDR) located at address $000C
9.4.1 SIOP Control Register
This register is located at address $000A and contains two bits.
Figure 9-3 shows the position of each bit in the register and indicates
the value of each bit after reset.
Address: $000A
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
SPE
MSTR
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-3. SIOP Control Register (SCR)
Technical Data
Serial Input/Output Ports (SIOP)
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MC68HC05P18A