MC68HC05P18A Datasheet, PDF (46/130 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Resets
Freescale Semiconductor, Inc.
IRQ
RESET
OSC
DATA
ADDRESS
V_DD
V_DD
TO IRQ
LOGIC
PULSE WIDTH = 4 X E-CLK
CLOCKED
PH2
ONE-SHOT
COP WATCHDOG
(COPR)
LOW-VOLTAGE
RESET (LVR)
POWER-ON RESET
(POR)
S
D
LATCH
PH2
CPU
RST
TO OTHER
PERIPHERALS
Figure 5-1. Reset Block Diagram
5.3 External Reset (RESET)
The RESET input is the only external reset and is connected to an
internal Schmitt trigger. The external reset occurs whenever the RESET
input is driven below the lower threshold and remains in reset until the
RESET pin rises above the upper threshold. The upper and lower
thresholds are given in Section 13. Electrical Specifications.
5.4 Internal Resets
The three internally generated resets are:
• Initial power-on reset (POR)
• Computer operating properly (COP) watchdog timer
• Low-voltage reset (LVR)
Technical Data
Resets
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MC68HC05P18A