MC9S08DZ60MLF Datasheet, PDF (89/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 6 Parallel Input/Output Control
6.5 Parallel I/O and Pin Control Registers
This section provides information about the registers associated with the parallel I/O ports. The data and
data direction registers are located in page zero of the memory map. The pull up, slew rate, drive strength,
and interrupt control registers are located in the high page section of the memory map.
Refer to tables in Chapter 4, “Memory,” for the absolute address assignments for all parallel I/O and their
pin control registers. This section refers to registers and control bits only by their names. A Freescale
Semiconductor-provided equate or header file normally is used to translate these names into the
appropriate absolute addresses.
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
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