MC9S08DZ60MLF Datasheet, PDF (248/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
7
R
DB7
W
6
DB6
5
DB5
4
DB4
3
DB3
2
DB2
1
DB1
0
DB0
Reset:
x
x
x
x
x
x
x
x
Figure 12-33. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
Field
7:0
DB[7:0]
Table 12-31. DSR0–DSR7 Register Field Descriptions
Data bits 7:0
Description
12.4.4 Data Length Register (DLR)
This register keeps the data length field of the CAN frame.
7
6
5
4
3
2
1
R
DLC3
DLC2
DLC1
W
Reset:
x
x
x
x
x
x
x
= Unused; always read “x”
Figure 12-34. Data Length Register (DLR) — Extended Identifier Mapping
0
DLC0
x
Table 12-32. DLR Register Field Descriptions
Field
3:0
DLC[3:0]
Description
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 12-33 shows the effect of setting the DLC bits.
MC9S08DZ60 Series Data Sheet, Rev. 4
248
Freescale Semiconductor