MC9S08DZ60MLF Datasheet, PDF(34/416 Page) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MC9S08DZ60MLF Datasheet, PDF (34/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

◁

Chapter 2 Pins and Connections

Table 2-1. Pin Availability by Package Pin-Count

3

Pin

Number

<-- Lowest Priority --> Highest

Pin

Number

<-- Lowest Priority --> Highest

64 48 32

Port

Pin/Interrupt

Alt 1

Alt 2

1 1 â PTB6 PIB6

2 â â PTC5

3 2 1 PTA7 PIA7

4 â â PTC6

5 3 â PTB7 PIB7

6 â â PTC7

742

853

9 6 4 PTG0

10 7 5 PTG1

11 8 6

12 9 â PTF4

13 10 â PTF5

14 â â PTF6

15 11 7 PTE0

16 12 8 PTE12

17 13 9 PTE2

18 14 10 PTE3

19 15 11 PTE4

20 16 12 PTE5

21 â â PTG2

22 â â PTG3

23 17 â PTF0

24 18 â PTF1

25 19 â PTF2

26 20 â PTF3

27 â â PTG4

28 â â PTG5

29 21 13 PTE6

30 22 14 PTE7

31 23 15 PTD0 PID0

32 24 16 PTD1 PID1

ADP14

ADP21

ADP7

ADP22

ADP15

ADP23

EXTAL

XTAL

TxD1

RxD12

SCL3

SDA3

IRQ

VDD

VSS

RESET

ACMP2+

ACMP2-

ACMP2O

SS

SPSCK

MOSI

MISO

TPM1CLK

TPM2CLK

TxD24

RxD24

SCL3

SDA3

TxD24

RxD24

TXCAN

RxCAN

TPM2CH0

TPM2CH1

64 48 32

Port

Pin/Interrupt

Alt 1

33 25 17 PTD2

34 26 18 PTD3

35 27 19 PTD4

36 28 20 PTD5

37 â â PTF7

38 29 â

39 30 â

40 31 â PTD6

41 32 â PTD7

42 33 21

43 â â PTC0

44 34 22 PTB0

45 â â PTC1

46 35 23 PTA0

47 â â PTC2

48 36 24 PTB1

49 37 25 PTA1

50 38 â PTB2

51 39 26 PTA2

52 â â PTC3

53 40 â PTB3

54 41 27 PTA3

55

42 28

56

57

43 29

58

59 44 30 PTA4

60 45 â PTB4

61 â â PTC4

62 46 31 PTA5

63 47 â PTB5

64 48 32 PTA6

PID2

PID3

PID4

PID5

PID6

PID7

PIB0

PIA0

PIB1

PIA1

PIB2

PIA2

PIB3

PIA3

PIA4

PIB4

PIA5

PIB5

PIA6

BKGD

ADP16

ADP8

ADP17

ADP0

ADP18

ADP9

ADP11

ADP10

ADP21

ADP19

ADP11

ADP3

ADP4

ADP12

ADP20

ADP5

ADP13

ADP6

Alt 2

TPM1CH0

TPM1CH1

TPM1CH2

TPM1CH3

VSS

VDD

TPM1CH4

TPM1CH5

MS

MCLK

ACMP1+1

ACMP1-1

ACMP1O

VSSA

VREFL

VREFH

VDDA

1. If both of these analog modules are enabled, they both will have access to the pin.

2. Pin does not contain a clamp diode to VDD and should not be driven above VDD. The voltage measured on this pin when internal

pull-up is enabled may be as low as VDD â 0.7 V. The internal gates connected to this pin are pulled to VDD.

3. The IIC module pins can be repositioned using IICPS bit in the SOPT1 register. The default reset locations are on PTF2 and PTF3.

4. The SCI2 module pins can be repositioned using SCI2PS bit in the SOPT1 register. The default reset locations are on PTF0 and

PTF1.

MC9S08DZ60 Series Data Sheet, Rev. 4

34

Freescale Semiconductor

▷