MC9S08DZ60MLF Datasheet, PDF (247/416 Pages) Freescale Semiconductor, Inc – MC9S08DZ60 Series Features

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
Field
7:5
ID[2:0]
4
RTR
3
IDE
Table 12-30. IDR1 Register Field Descriptions
Description
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in Table 12-29.
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read ‘x’
Figure 12-31. Identifier Register 2 — Standard Mapping
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read ‘x’
Figure 12-32. Identifier Register 3 — Standard Mapping
12.4.3 Data Segment Registers (DSR0-7)
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
247