PXR40 Datasheet, PDF (88/100 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Electrical characteristics
5.12.6 External interrupt timing (IRQ pin)
Table 34. External interrupt timing¹
Spec
Characteristic
Symbol
Min
Max
Unit
1 IRQ Pulse Width Low
t_IPWL
3
—
t_cyc2
2 IRQ Pulse Width High
t_IPWH
3
—
t_cyc2
3 IRQ Edge to Edge Time³
t_ICYC
6
—
t_cyc2
1 _{IRQ timing specified at VDD = 1.08 V to 1.32 V, VDDEH = 3.0 V to 5.5 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA = TL}
to T_H.
2 _{See Notes on tcyc on Figure 8 and Table 25 in Section 5.11.1 Clocking.}
3 _{Applies when IRQ pins are configured for rising edge or falling edge events, but not both.}
IRQ
1
2
3
Figure 23. External interrupt timing
5.12.7 eTPU timing
Table 35. eTPU timing¹
Spec
Characteristic
Symbol
Min
Max
Unit
1 eTPU Input Channel Pulse Width
t_ICPW
4
—
t_cyc2
2 eTPU Output Channel Pulse Width
t_OCPW
1³
—
t_cyc2
1 _{eTPU timing specified at VDD = 1.08 V to 1.32 V, VDDEH = 3.0 V to 5.5 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA = TL to TH,}
and C_L = 200 pF with SRC = 0b00.
2 _{See Notes on tcyc on Figure 8 and Table 25 in Section 5.11.1 Clocking.}
3 _{This specification does not include the rise and fall times. When calculating the minimum eTPU pulse width, include the rise}
and fall times defined in the slew rate control fields (SRC) of the pad configuration registers (PCR).
PXR40 Microcontroller Data Sheet, Rev. 1
88
Freescale Semiconductor