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PXR40 Datasheet, PDF (75/100 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller
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Electrical characteristics
Table 28. Pad AC specifications (vddeh = 5.0 V, VDDE = 3.3 V)1 (continued)
Pad
SRC/DSC
Out Delay2,4
L  H/H  L (ns)
Rise/Fall3,4
(ns)
Fast6
00
01
2.5
1.2
10
11
Fast with Slew Rate
00
40/40
16/16
50/50
21/21
01
13/13
5/5
19/19
8/8
10
8/8
2.4/2.4
12/12
5/5
11
5/5
1.1/1/1
8/8
2.6
Pull Up/Down (3.6 V max)
—
—
7500
Pull Up/Down (5.25 V max)
—
6000
5000/5000
Load Drive
(pF)
10
20
30
50
50
200
50
200
50
200
50
2.6
50
50
1 These are worst case values that are estimated from simulation and not tested. The values in the table are simulated at
VDD = 1.02 V to 1.32 V, VDDE = 3.0 V to 3.6 V, VDDEH = 4.75 V to 5.25 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA = TL to TH.
2 This parameter is supplied for reference and is not guaranteed by design and not tested.
3 This parameter is guaranteed by characterization before qualification rather than 100% tested.
4 Delay and rise/fall are measured to 20% or 80% of the respective signal.
5 Out delay is shown in Figure 9. Add a maximum of one system clock to the output delay for delay with respect to system clock.
6 Out delay is shown in Figure 9. Add a maximum of one system clock to the output delay for delay with respect to system clock.
Table 29. Derated pad AC specifications (VDDEH = 3.3 V)1
Spec
Pad
SRC/DSC
Out Delay2,3
L  H/H  L (ns)
Rise/Fall4,3
(ns)
Load Drive
(pF)
1
Medium5
00
200/210
86/86
50
2
270/285
120/120
200
3
01
37/45
15.5/19
50
4
69/82
38/43
200
5
11
18/17
7.6/8.5
50
6
46/49
30/34
200
1 These are worst case values that are estimated from simulation and not tested. The values in the table are simulated at
VDD = 1.08 V to 1.32 V, VDDE = 3.0 V to 3.6 V, VDDEH = 3.0 V to 3.6 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA = TL to TH.
2 This parameter is supplied for reference and is not guaranteed by design and not tested.
3 Delay and rise/fall are measured to 20% or 80% of the respective signal.
4 This parameter is guaranteed by characterization before qualification rather than 100% tested.
5 Out delay is shown in Figure 9. Add a maximum of one system clock to the output delay for delay with respect to system clock.
PXR40 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
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