PXR40 Datasheet, PDF (57/100 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Electrical characteristics
Table 8. PMC electrical specifications (continued)
ID
Name
Parameter
Min
Typ
Max
Unit
2a —
2b —
Untrimmed VRC 1.2V output variation before
band gap trim (unloaded)
V_DD12OUT – 8% V_DD12OUT V_DD12OUT + 17% V
Note: Voltage should be higher than maximum
V_LVD12 to avoid LVD event
Trimmed VRC 1.2V output variation after band V_DD12OUT – 5% V_DD12OUT V_DD12OUT + 10% V
gap trim (REGCTL load max. 20mA, VDD load
max. 1A)¹
2c V_STEPV12
3 V_PORC
3a —
3b —
Trimming step V_DD12OUT
POR rising VDD 1.2V
POR VDD 1.2V variation
POR 1.2V hysteresis
—
10
—
mV
—
0.7
—
V
V_PORC – 30%
V_PORC
V_PORC + 30%
—
75
—
mV
4 V_LVD12
4a —
Nominal rising LVD 1.2V
Note: ~V_DD12OUT × 0.87
—
1.100
—
V
Untrimmed LVD 1.2V variation before band gap V_LVD12 – 6%
V_LVD12
V_LVD12 + 6%
V
trim
Note: Rising VDD
4b —
Trimmed LVD 1.2V variation after band gap trim V_LVD12 – 3%
V_LVD12
V_LVD12 + 3%
V
Rising VDD
4c —
LVD 1.2V Hysteresis
15
20
25
mV
4d V_LVDSTEP12 Trimming step LVD 1.2V
—
10
—
mV
5 I_REGCTL
VRC DC current output on REGCTL
—
—
20
mA
6—
Voltage regulator 1.2V current consumption
—
3
—
mA
VDDREG
7 V_DD33OUT
7a —
Nominal V_REG 3.3V output
—
3.3
—
V
Untrimmed V_REG 3.3V output variation before V_DD33OUT – 6% V_DD33OUT V_DD33OUT + 10% V
band gap trim (unloaded)
Note: Rising VDDSYN
7b —
Trimmed V_REG 3.3V output variation after band V_DD33OUT – 5% V_DD33OUT V_DD33OUT + 10% V
gap trim (max. load 80mA)
7c V_STEPV33
Trimming step VDDSYN
—
30
—
mV
8 V_LVD33
Nominal rising LVD 3.3V
Note: ~V_DD33OUT × 0.872
—
2.950
—
V
8a —
Untrimmed LVD 3.3V variation before band gap V_LVD33 – 5%
V_LVD33
V_LVD33 + 5%
V
trim
Note: Rising VDDSYN
8b —
Trimmed LVD 3.3V variation after bad gap trim
V_LVD33 – 3%
V_LVD33
V_LVD33 + 3%
V
Note: Rising VDDSYN
8c —
LVD 3.3V Hysteresis
—
30
—
mV
8d V_LVDSTEP33 Trimming step LVD 3.3V
—
30
—
mV
PXR40 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
57