PXR40 Datasheet, PDF (72/100 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Electrical characteristics
Table 24. PFCPR1 settings vs. frequency of operation¹
Spec
Clock
Mode
1 Enhanced
Maximum Frequency²
(MHz)
Core
f_sys
264 MHz⁶
Platform
f_platf
132 MHz⁶
APC =
RWSC
0b011
WWSC DPFEN³ IPFEN³
0b01 0b0
0b0
0b1
0b1
PFLIM⁴
0b00
0b01
0b1x
BFEN⁵
0b0
0b1
2 Enhanced/ 200 MHz 100 MHz 0b010 0b01 0b0
0b0
Full
0b1
0b1
0b00
0b0
0b01
0b1
0b1x
3 Legacy 132 MHz 132 MHz 0b100 0b01 0b0
0b0
0b1
0b1
0b00
0b0
0b01
0b1
0b1x
Default setting after reset: 0b111 0b11 0b00
0b00
0b00
0b0
1 _{Illegal combinations exist. Use entries from the same row in this table.}
2 _{This is the nominal maximum frequency of operation: platform runs at fsys/2 in Enhanced Mode .}
3 _{For maximum flash performance, set to 0b1.}
4 _{For maximum flash performance, set to 0b10.}
5 _{For maximum flash performance, set to 0b1.}
6 _{This is the nominal maximum frequency of operation in Enhanced Mode. Max speed is the maximum speed}
allowed including frequency modulation (FM). 270 MHz parts allow for 264 MHz system core clock(f_sys) + 2% FM
and 132 Mhz platform clock (f_platf)+ 2% FM.
PXR40 Microcontroller Data Sheet, Rev. 1
72
Freescale Semiconductor