MC68HC05C8A Datasheet, PDF (80/116 Pages) Motorola, Inc – Microcontrollers

Instruction Set
Source
Form
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSR opr
LSRA
LSRX
LSR opr,X
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG opr,X
NEG ,X
NOP
ORA #opr
ORA opr
ORA opr
ORA opr,X
ORA opr,X
ORA ,X
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
RSP
Table 12-6. Instruction Set Summary (Sheet 4 of 6)
Operation
Load Accumulator with Memory Byte
Load Index Register with Memory Byte
Logical Shift Left (Same as ASL)
Logical Shift Right
Unsigned Multiply
Negate Byte (Two’s Complement)
No Operation
Logical OR Accumulator with Memory
Rotate Byte Left through Carry Bit
Rotate Byte Right through Carry Bit
Reset Stack Pointer
Description
A ← (M)
X ← (M)
C
b7
0
b0
0
b7
C
b0
X : A ← (X) × (A)
M ← –(M) = $00 – (M)
A ← –(A) = $00 – (A)
X ← –(X) = $00 – (X)
M ← –(M) = $00 – (M)
M ← –(M) = $00 – (M)
A ← (A) ∨ (M)
C
b7
b0
C
b7
b0
SP ← $00FF
Effect
on CCR
H I NZC
IMM A6 ⁱⁱ 2
DIR B6 dd 3
——   —
EXT
IX2
C6 ^{hh ll} 4
D6 ^{ee ff} 5
IX1 E6 ff 4
IX F6
3
IMM AE ⁱⁱ 2
DIR BE dd 3
——   —
EXT
IX2
CE ^{hh ll} 4
DE ^{ee ff} 5
IX1 EE ff 4
IX FE
3
DIR 38 ^dd 5
INH 48
3
— —    INH 58
3
IX1 68 _ff 6
IX 78
5
DIR 34 ^dd 5
INH 44
3
— — 0   INH 54
3
IX1 64 _ff 6
IX 74
5
0 — — — 0 INH 42
1
1
DIR 30 ^dd 5
INH 40
3
— —    INH 50
3
IX1 60 _ff 6
IX 70
5
— — — — — INH 9D
2
IMM AA ⁱⁱ 2
DIR BA dd 3
——   —
EXT
IX2
CA ^{hh ll} 4
DA ^{ee ff} 5
IX1 EA ff 4
IX FA
3
DIR 39 ^dd 5
INH 49
3
— —    INH 59
3
IX1 69 _ff 6
IX 79
5
DIR 36 ^dd 5
INH 46
3
— —    INH 56
3
IX1 66 _ff 6
IX 76
5
— — — — — INH 9C
2
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A Data Sheet, Rev. 5.1
80
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