MC68HC05C8A Datasheet, PDF (68/116 Pages) Motorola, Inc – Microcontrollers

Operating Modes
RESET
1
IRQ
2
NC
3
PA7
4
PA6
5
PA5
6
PA4
7
PA3
8
PA2
9
PA1
10
PA0
11
PB0
12
PB1
13
PB2
14
PB3
15
PB4
16
PB5
17
PB6
18
PB7
19
V_SS
20
40
V_DD
39
OSC1
38
OSC2
37
TCAP
36
PD7
35
PD6/TCMP
34
PD5/SS
33
PD4/SCK
32
PD3/MOSI
31
PD2/MISO
30
PD1/TDO
29
PD0/RDI
28
PC0
27
PC1
26
PC2
25
PC3
24
PC4
23
PC5
22
PC6
21
PC7
Figure 11-1. User Mode Pinout
11.3 Self-Check Mode
Self-check mode is entered upon the rising edge of RESET if the IRQ pin is at V_TST and the TCAP pin is
at logic 1.
11.3.1 Self-Check Tests
The self-check read-only memory (ROM) at mask ROM location $1F00–$1FEF determines if the MCU is
functioning properly.These tests are performed:
1. I/O — Functional test of ports A, B, and C
2. Random-access memory (RAM) — Counter test for each RAM byte
3. Timer — Test of counter register and OCF bit
4. Serial communications interface (SCI) — Transmission test checks for RDRF, TDRE, TC, and FE
flags
5. Read-only memory (ROM) — Exclusive OR with odd ones parity result
6. Serial peripheral interface (SPI) — Transmission test checks for SPIF and WCOL flags
The self-check circuit is shown in Figure 11-2.
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A Data Sheet, Rev. 5.1
68
Freescale Semiconductor