MC68HC05C8A Datasheet, PDF (54/116 Pages) Motorola, Inc – Microcontrollers

Serial Communications Interface (SCI)
9.5.3 SCI Control Register 2
SCI control register 2 has these functions:
• Enables the SCI receiver and SCI receiver interrupts
• Enables the SCI transmitter and SCI transmitter interrupts
• Enables SCI receiver idle interrupts
• Enables SCI transmission complete interrupts
• Enables SCI wakeup
• Transmits SCI break characters
Address: $000F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 9-6. SCI Control Register 2 (SCCR2)
TIE — Transmit Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TDRE bit becomes set. Reset clears the
TIE bit.
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
TCIE — Transmission Complete Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TC bit becomes set. Reset clears the TCIE
bit
1 = TC interrupt requests enabled
0 = TC interrupt requests disabled
RIE — Receive Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the RDRF bit or the OR bit becomes set. Reset
clears the RIE bit.
1 = RDRF interrupt requests enabled
0 = RDRF interrupt requests disabled
ILIE — Idle Line Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the IDLE bit becomes set. Reset clears the
ILIE bit.
1 = IDLE interrupt requests enabled
0 = IDLE interrupt requests disabled
TE — Transmit Enable Bit
Setting this read/write bit begins the transmission by sending a preamble of 10 or 11 logic 1s from the
transmit shift register to the PD1/TDO pin. Reset clears the TE bit.
1 = Transmission enabled
0 = Transmission disabled
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A Data Sheet, Rev. 5.1
54
Freescale Semiconductor