SGTL5000XNAA3R2 Datasheet, PDF (46/68 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

FUNCTIONAL DEVICE OPERATION
PROGRAMMING EXAMPLES
BITS
15:14
FIELD
HP_IALL_ADJ
RW RESET
RW 0x0
13:12 HP_I1_ADJ
RW 0x0
11:9
HP_ANTIPOP
RW 0x0
8
HP_CLASSAB
RW 0x1
7
HP_HOLD_GND_CE RW 0x1
NTER
6
HP_HOLD_GND
RW 0x1
5
VAG_DOUB_CURRE RW 0x0
NT
4
VAG_CLASSA
RW 0x0
3
TM_ADCIN_TOHP
RW 0x0
2
TM_HPCOMMON
RW 0x0
1
TM_SELECT_MIC
RW 0x0
0
TESTMODE
RW 0x0
Table 38. CHIP_ANA_TEST2 0x003A
15
14
13
12
11
10
DEFINITION
These bits control the overall bias current of the headphone amplifier (all stages
including first and output stage).
0x0=nominal, 0x1=-50%, 0x2=+50%, 0x3=-40%
These bits control the bias current for the first stage of the headphone amplifier.
0x0=nominal, 0x1=-50%, 0x2=+100%, 0x3=+50%
These bits control the headphone output current in classA mode and also the pull-down
strength while powering off. These bits normally are not needed.
This defaults high. When this bit is high the headphone is in classAB mode. ClassA
mode would normally not be used.
This defaults high. When this bit is high and the capless headphone center channel is
powered off, the output is tied to ground. This is the preferred mode of operation for
best antipop performance.
This defaults high. When this bit is high and the headphone is powered off, the output
is tied to ground. This is the preferred mode of operation for best antipop performance.
Double the VAG output current when in classA mode.
Turn off the classAB output current for the VAG buffer. The classA current is limited so
this may cause clipping in some modes.
Put ADCmux output onto the headphone output pin. Must remove headphone load and
any external headphone compensation for this mode.
Enable headphone common to be used in ADCmux for testing
Enable the mic-adc-dac-HP path
Enable the analog test mode paths
9
8
7
6
5
4
3
2
1
0
BITS
15
14
13
12
11
FIELD
RW
RSVD
RO
LINEOUT_TO_VDDA RW
SPARE
RW
MONOMODE_DAC RW
VCO_TUNE_AGAIN RW
RESET
0x0
0x0
0x0
0x0
0x0
DEFINITION
Reserved
Changes the LINEOUT amplifier power supply from VDDIO to VDDA. Typically
LINEOUT should be on the higher power supply. This bit is useful when VDDA is
~3.3 V and VDDIO is ~1.8 V.
Spare registers to analog.
Copy the left channel DAC data to the right channel. This allows both left and right to
play from MONO dac data.
When toggled high then low forces the PLL VCO to retune the number of inverters in
the ring oscillator loop.
SGTL5000
46
Analog Integrated Circuit Device Data
Freescale Semiconductor