SGTL5000XNAA3R2 Datasheet, PDF (40/68 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

FUNCTIONAL DEVICE OPERATION
PROGRAMMING EXAMPLES
BITS
FIELD
RW RESET
DEFINITION
3:1
BIAS_CTRL
RW
0x0
Bias control
These bits adjust the bias currents for all of the analog blocks. By lowering the bias
current a lower quiescent power is achieved. It should be noted that this mode can
affect performance by 3-4 dB.
0x0 = Nominal
0x1-0x3=+12.5%
0x4=-12.5%
0x5=-25%
0x6=-37.5%
0x7=-50%
0
SMALL_POP
RW
0x0
VAG Ramp Control
Setting this bit slows down the VAG ramp from ~200 to ~400 ms to reduce the startup
pop, but increases the turn on/off time.
0x0 = Normal VAG ramp
0x1 = Slow down VAG ramp
The Table 29, CHIP_MIC_CTRL 0x002A register controls
the microphone gain and the internal microphone biasing
circuitry.
Table 29. CHIP_MIC_CTRL 0x002A
15
14
13
12
11
10
9
8
7
6
5
4
RSVD
BIAS_RESISTOR RSVD
BIAS_VOLT
3
2
RSVD
1
0
GAIN
BITS
15:10
9:8
7
6:4
3:2
1:0
FIELD
RSVD
BIAS_RESISTOR
RSVD
BIAS_VOLT
RSVD
GAIN
RW RESET
DEFINITION
RO
0x0
Reserved
RW
0x0
MIC Bias Output Impedance Adjustment
Controls an adjustable output impedance for the microphone bias. If this is set to zero
the micbias block is powered off and the output is highZ.
0x0 = Powered off
0x1 = 2.0 kohm
0x2 = 4.0 kohm
0x3 = 8.0 kohm
RO
0x0
Reserved
RW
0x0
MIC Bias Voltage Adjustment
Controls an adjustable bias voltage for the microphone bias amp in 250 mV steps. This
bias voltage setting should be no more than VDDA-200 mV for adequate power supply
rejection.
0x0 = 1.25 V
...
0x7 = 3.00 V
RO
0x0
Reserved
RW
0x0
MIC Amplifier Gain
Sets the microphone amplifier gain. At 0 dB setting the THD can be slightly higher than
other paths- typically around ~65 dB. At other gain settings the THD are better.
0x0 = 0 dB
0x1 = +20 dB
0x2 = +30 dB
0x3 = +40 dB
SGTL5000
40
Analog Integrated Circuit Device Data
Freescale Semiconductor