SGTL5000XNAA3R2 Datasheet, PDF (37/68 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

FUNCTIONAL DEVICE OPERATION
PROGRAMMING EXAMPLES
BITS
7:4
3:0
FIELD
ADC_VOL_RIGHT
ADC_VOL_LEFT
RW RESET
DEFINITION
RW
0x0
ADC Right Channel Volume
Right channel analog ADC volume control in 1.5.0 dB steps.
0x0 = 0 dB
0x1 = +1.5 dB
...
0xF = +22.5 dB
This range is -6.0 dB to +16.5 dB if ADC_VOL_M6DB is set to 1.
RW
0x0
ADC Left Channel Volume
Left channel analog ADC volume control in 1.5 dB steps.
0x0 = 0 dB
0x1 = +1.5 dB
...
0xF = +22.5 dB
This range is -6.0 dB to +16.5 dB if ADC_VOL_M6DB is set to 1.
Table 25. CHIP_ANA_HP_CTRL 0x0022
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSVD
HP_VOL_RIGHT
RSVD
HP_VOL_LEFT
BITS FIELD
RW RESET DEFINITION
15
RSVD
RO
0x0
Reserved
14:8
HP_VOL_RIGHT
RW
0x18 Headphone Right Channel Volume
Right channel headphone volume control with 0.5 dB steps.
0x00 = +12 dB
0x01 = +11.5 dB
0x18 = 0 dB
...
0x7F = -51.5 dB
7
RSVD
RO
0x0
Reserved
6:0
HP_VOL_LEFT
RW
0x18
Headphone Left Channel Volume
Left channel headphone volume control with 0.5 dB steps.
0x00 = +12 dB
0x01 = +11.5 dB
0x18 = 0 dB
...
0x7F = -51.5 dB
Table 26 is an analog control register that includes mutes,
input selects, and zero-cross-detectors for the ADC,
headphone, and LINEOUT.
Analog Integrated Circuit Device Data
Freescale Semiconductor
SGTL5000
37