SGTL5000XNAA3R2 Datasheet, PDF (35/68 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

FUNCTIONAL DEVICE OPERATION
PROGRAMMING EXAMPLES
Table 22. CHIP_DAC_VOL 0x0010
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DAC_VOL_RIGHT
DAC_VOL_LEFT
BITS
15:8
7:0
FIELD
DAC_VOL_RIGHT
DAC_VOL_LEFT
RW RESET
DEFINITION
RW
0x3C
DAC Right Channel Volume
Set the Right channel DAC volume with 0.5017 dB steps from 0 to -90 dB
0x3B and less = Reserved
0x3C = 0 dB
0x3D = -0.5 dB
0xF0 = -90 dB
0xFC and greater = Muted
If VOL_RAMP_EN = 1, there is an automatic ramp to the new volume setting.
RW
0x3C
DAC Left Channel Volume
Set the Left channel DAC volume with 0.5017 dB steps from 0 to -90 dB
0x3B and less = Reserved
0x3C = 0 dB
0x3D = -0.5 dB
0xF0 = -90 dB
0xFC and greater = Muted
If VOL_RAMP_EN = 1, there is an automatic ramp to the new volume setting.
Table 23. CHIP_PAD_STRENGTH 0x0014
15
14
13
12
11
10
9
8
7
6
RSVD
I2S_LRCLK
I2S_SCLK
5
4
I2S_DOUT
3
2
CTRL_DATA
BITS
15:14
9:8
7:6
FIELD
RSVD
I2S_LRCLK
I2S_SCLK
RW RESET
DEFINITION
RW
0x0
Reserved
RW
0x1
I²S LRCLK Pad Drive Strength
Sets drive strength for output pads per the table below.
VDDIO
1.8 V
2.5 V
3.3 V
0x0 = Disable
0x1 =
1.66 mA 2.87 mA 4.02 mA
0x2 =
3.33 mA 5.74 mA 8.03 mA
0x3 =
4.99 mA 8.61 mA 12.05 mA
RW
0x1
I²S SCLK Pad Drive Strength
Sets drive strength for output pads per the table below.
VDDIO
1.8 V
2.5 V
3.3 V
0x0 = Disable
0x1 =
1.66 mA 2.87 mA 4.02 mA
0x2 =
3.33 mA 5.74 mA 8.03 mA
0x3 =
4.99 mA 8.61 mA 12.05 mA
1
0
CTRL_CLK
Analog Integrated Circuit Device Data
Freescale Semiconductor
SGTL5000
35