MC68HC05X4 Datasheet, PDF (44/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
CPU
Source
Form
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
RSP
RTI
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SWI
TAX
Table 6. Instruction Set Summary (Continued)
Operation
Rotate Byte Right through Carry Bit
Description
C
b7
b0
Effect on
CCR
H I NZC
DIR 36 ^dd 5
INH 46
3
— — ¤◊ ¤ ¤ INH 56
3
IX1 66 ff 6
IX 76
5
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Subtract Memory Byte and Carry Bit from
Accumulator
Set Carry Bit
Set Interrupt Mask
Store Accumulator in Memory
Stop Oscillator and Enable IRQ Pin
Store Index Register In Memory
Subtract Memory Byte from Accumulator
Software Interrupt
Transfer Accumulator to Index Register
SP ← $00FF
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
—————
¤◊ ¤ ¤ ¤ ¤
—————
A ← (A) – (M) – (C)
— — ◊¤ ¤ ¤
C←1
I←1
M ← (A)
M ← (X)
———— 1
— 1 ———
— — ¤◊ ¤ —
— 0 ———
— — ¤◊ ¤ —
A ← (A) – (M)
—— ¤ ¤ ¤
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
— 1 ———
SP ← (SP) – 1; I ← 1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
X ← (A)
—————
INH
INH
INH
IMM
DIR
EXT
IX2
IX1
IX
INH
INH
DIR
EXT
IX2
IX1
IX
INH
DIR
EXT
IX2
IX1
IX
IMM
DIR
EXT
IX2
IX1
IX
INH
INH
9C
2
80
9
81
6
A2 ii 2
B2 dd 3
C2 hh ll 4
D2 ee ff 5
E2 ff 4
F2
3
99
2
9B
2
B7 dd 4
C7 hh ll 5
D7 ee ff 6
E7 ff 5
F7
4
8E
2
BF dd 4
CF hh ll 5
DF ee ff 6
EF ff 5
FF
4
A0 ii 2
B0 dd 3
C0 hh ll 4
D0 ee ff 5
E0 ff 4
F0
3
83
10
97
2
MC68HC05X4
CPU
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