MC68HC05X4 Datasheet, PDF (116/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
16-Bit Programmable Timer
Timer status
register (TSR)
The timer status register ($13) contains the status bits for the interrupt
conditions ICF, OCF, and TOF.
Accessing the timer status register satisfies the first condition required
to clear the status bits. The remaining step is to access the register
corresponding to the status bit.
Address: $0013
Bit 7
6
5
4
3
2
1
Bit 0
ICF
OCF
TOF
0
0
0
0
0
Reset: u
u
u
0
0
0
0
0
Figure 7. Timer Status Register (TSR)
ICF — Input capture flag
1 = A valid input capture has occurred.
0 = No input capture has occurred.
This bit is set when the selected polarity of edge is detected by the input
capture edge detector; an input capture interrupt will be generated, if
ICIE is set. ICF is cleared by reading the TSR and then the input capture
low register ($15).
OCF — Output compare flag
1 = A valid output compare has occurred.
0 = No output compare has occurred.
This bit is set when the output compare register contents match those of
the free-running counter; an output compare interrupt will be generated,
if OCIE is set. OCF is cleared by reading the TSR and then the output
compare low register ($17).
TOF — Timer overflow flag
1 = Timer overflow has occurred.
0 = No timer overflow has occurred.
This bit is set when the free-running counter overflows from $FFFF to
$0000; a timer overflow interrupt will occur, if TOIE is set. TOF is cleared
by reading the TSR and the counter low register ($19).
MC68HC05X4 Rev 1.0
16-Bit Programmable Timer
For More Information On This Product,
Go to: www.freescale.com
8-ptimer