MC68HC05X4 Datasheet, PDF (101/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Motorola CAN
Sleep mode
Port configuration
register (PCR)
Address: $0003
Bit 7
6
5
4
3
2
1
WOIF TIMEN CAF BPDE BWE
Reset: -
-
0
0
0
0
0
Figure 22. Port Configuration Register (PCR)
Bit 0
AWPS
0
CAF — MCAN asleep flag
1 = The MCAN is in sleep mode
0 = The MCAN is awake
In order to minimize power consumption, the active comparator is
switched off and the sleep comparator circuitry is used to detect
activity on the bus. When in sleep mode the MCAN stops its own
clocks, leaving the MCU in normal run mode. (Similarly a STOP
instruction will stop the processor clocks, leaving the MCAN in run
mode.) The on-chip oscillator will stop only if the MCAN is in sleep
mode and the MCU executes a STOP instruction. There is a time
delay between the STOP instruction being executed and the oscillator
stopping. During this time it is possible that the MCAN will come out
of sleep mode, and hence prevent the oscillator from stopping.
When a dominant level is detected on the MCAN bus, the MCAN is
woken up and a wake-up interrupt is generated.
Sleep comparator
reference
When the COMPSEL bit in the MCAN command register ($21) is cleared
the sleep comparator inputs are the same as for the active comparator.
However, when the COMPSEL bit is set each input is compared with
V_DD/2 (VDDH – see Figure 21) to detect a dominant level. For further
details of the active comparator, the sleep comparator and VDDH, refer
to ELECTRICAL SPECIFICATIONS.
33-mcan
Motorola CAN
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MC68HC05X4 Rev 1.0