MC68HC05RC17 Datasheet, PDF (25/128 Pages) Freescale Semiconductor, Inc – General Release Specification

1.5.10 XFC
Freescale Semiconductor, Inc.
General Description
Signal Description
This pin provides a means for connecting an external filter capacitor to
the synthesizer phase-locked loop filter. (For additional information
concerning this capacitor, refer to Section 10. Phase-Locked Loop
(PLL) Synthesizer.)
1.5.11 V_DDSYN
NOTE:
This pin provides a separate power connection to the PLL synthesizer
which should be at the same potential as V_DD.
Any unused inputs, I/O ports, and no connects should be tied to an
appropriate logic level (either V_DD or V_SS). Although the I/O ports of the
MC68HC05RC17 do not require termination, termination is
recommended to reduce the possibility of static damage.
MC68HC05RC17 — Rev. 2.0
General Release Specification
General Description
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