MCIMX233CJM4B Datasheet, PDF (1282/1612 Pages) Freescale Semiconductor, Inc – i.MX23 Applications Processor Reference Manual

Power Supply
32.3.2.3 5-V Power and Battery Power
Battery charge can also be enabled to provide additional power efficiency when connected to 5V. If the
DCDC switching converter is also enabled, the buck switching converters will efficiently convert the bat-
tery voltage to the desired VDDA, VDDD, and VDDIO voltages (instead of using the less efficient inter-
nal linear regulators).
32.3.3 Power-Up Sequence
The DC-DC converter controls the power-up and reset of the i.MX23. The power-up sequence begins
when the battery is connected to the BATT pin of the device (or a 5V source is connected to the VDD5V
pin). Either the BATT pin or VDD5V provides power to the DC-DC startup circuitry, the crystal oscilla-
tor, and the real-time clock. This means that the crystal oscillator can be running, if desired, whenever a
battery is connected to BATT pin. This feature allows the real-time clock to operate when the chip is in
the off state. The crystal oscillator/RTC is the only power drain on the battery in this state and consumes
only a very small amount of power. During this time, the VDDIO, VDDD and VDDA supplies are held at
ground. This is the off state that continues until the system power up begins.
Power-up can be started with one of several events:
• PSWITCH pin >= minimum MID level PSWITCH for 100 ms (see “Characteristics &
Specifications” chapter)
• VDD5V power pin >= minimum VDD5V voltage for 100 ms (see “Characteristics &
Specifications” chapter)
• Real-time clock alarm wakeup
When a power-up event has occurred, if VDD5V is valid, then the on-chip linear regulators charge the
VDDD, VDDA and VDDIO rails to their default voltages. If VDD5V is not valid, then the DC-DC sup-
plies the VDDD, VDDA, and VDDIO rails. When the voltage rails have reached their target values, the
digital logic reset is deasserted and the CPU begins executing code. If the power supplies do not reach the
target values by the time PSWITCH is deasserted or 5V is removed, the system returns to the off state.
The power-up time is dependent on the VDDD/VDDA/VDDIO load and battery or VDD5V voltage, but
should be less than 100 ms. The VDDD//VDDAVDDIO load should be minimal during power up to
ensure proper startup of the DC-DC converter.
There is an integrated 5-KΩ resistor that can be switched in between the VDDXTAL pin and PSWITCH.
If enabled using HW_RTC_PERSISTENT0_AUTO_RESTART, then the device immediately begins the
power-up sequence after power-down.
32-8
i.MX23 Applications Processor Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor