MCIMX233CJM4B Datasheet, PDF (1105/1612 Pages) Freescale Semiconductor, Inc – i.MX23 Applications Processor Reference Manual

Pulse-Width Modulator (PWM) Controller
Table 24-10. HW_PWM_PERIOD1 Bit Field Descriptions
BITS
22:20 CDIV
LABEL
19:18 INACTIVE_STATE
17:16 ACTIVE_STATE
15:0 PERIOD
RW RESET
RW 0x0
RW 0x0
RW 0x0
RW 0x0
DEFINITION
Clock divider ratio to apply to the crystal clock
frequency (24.0 MHz) that times the PWM output
signal.
DIV_1 = 0x0 Divide by 1.
DIV_2 = 0x1 Divide by 2.
DIV_4 = 0x2 Divide by 4.
DIV_8 = 0x3 Divide by 8.
DIV_16 = 0x4 Divide by 16.
DIV_64 = 0x5 Divide by 64.
DIV_256 = 0x6 Divide by 256.
DIV_1024 = 0x7 Divide by 1024.
The logical inactive state that is mapped to the PWM
output signal. Note that the undefined state of 0x1 is
mapped to high-impedance.
HI_Z = 0x0 Inactive state sets PWM output to high-impedance.
0 = 0x2 Inactive state sets PWM output to 0 (low).
1 = 0x3 Inactive state sets PWM output to 1 (high).
The logical active state is mapped to the PWM output
signal. Note that the undefined state of 0x1 is mapped
to high-impedance.
HI_Z = 0x0 Active state sets PWM output to high-impedance.
0 = 0x2 Active state sets PWM output to 0 (low).
1 = 0x3 Active state sets PWM output to 1 (high).
Number of divided XTAL clock cycles in the entire
period of the PWM waveform, minus 1. For example,
to obtain 6 clock cycles in the actual period, set this
field to 5.
DESCRIPTION:
This register contains the programming paramters for multi-chip attachment mode, clock divider value,
active high, low values and period for channel 1.
EXAMPLE:
HW_PWM_PERIODn_WR(1, 0x00000b1f); // Set up period and active/inactive output states
24.4.6 PWM Channel 2 Active Register Description
The PWM Channel 2 Active Register specifies the active time and inactive time for Channel 2.
HW_PWM_ACTIVE2
HW_PWM_ACTIVE2_SET
HW_PWM_ACTIVE2_CLR
HW_PWM_ACTIVE2_TOG
0x050
0x054
0x058
0x05C
Table 24-11. HW_PWM_ACTIVE2
33222222222211111111110000000000
10987654321098765432109876543210
Freescale Semiconductor
i.MX23 Applications Processor Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
24-11