MC68HC55 Datasheet, PDF (1/40 Pages) Freescale Semiconductor, Inc – Two-Channel CMOS ASIC Device

Order Number: MC68HC55
Rev. 2
MC68HC55/D
Technical Data
Two-Channel CMOS ASIC Device
Section 1. DSI/D (Distributed System Interface – Digital)
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
1.2 General Description of the DSI System. . . . . . . . . . . . . . . . .3
1.3 Overall DSI System Connections . . . . . . . . . . . . . . . . . . . . .3
Section 2. MC68HC55CD Pin Assignments and Descriptions
2.1 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.2 Pin Function Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Section 3. Registers and Bit Descriptions
3.1 DSI Channel 0 Data Registers . . . . . . . . . . . . . . . . . . . . . . .9
3.2 DSI Channel 1 Data Registers . . . . . . . . . . . . . . . . . . . . . .10
3.3 DSI Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4 DSI Channel Control Registers . . . . . . . . . . . . . . . . . . . . . .13
3.5 DSI Channel Enable Bits. . . . . . . . . . . . . . . . . . . . . . . . . . .17
Section 4. Functional Description
4.1 Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2 Abort Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.3 Enable (Disable) Function . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.4 SPI Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
4.5 DSI/D to DSI/P Communications. . . . . . . . . . . . . . . . . . . . .29
4.6 CRC Generation/Checking . . . . . . . . . . . . . . . . . . . . . . . . .30
4.7 CRC Computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
4.8 Message Size Special Cases . . . . . . . . . . . . . . . . . . . . . . .31
Section 5. Timing and Electrical Specifications
5.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
5.2 DC Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . .34
5.3 Timing Characteristics for DSI/D to DSI/P Interface . . . . . .34
5.4 Timing Characteristics for SPI Interface . . . . . . . . . . . . . . .36
Section 6. Mechanical Data and Ordering Information
6.1 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
6.2 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
6.3 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 1999, 2006