W65C832_1 Datasheet, PDF (5/64 Pages) –

WOC
THE WESTERN DESIGN CENTER, INC.
tABLE OF CONTENTS
INTRODUCTION
SECTION 1: W65C832 FUNCTION DESCRIPTION
1.1 Instruction Register and Decode
1.2 Timing Control Unit . . .
1.3 Arithmetic and Logic Unit
1.4 Internal Registers .. .
1.5 Accumulators . . . . .
1.6 Data Bank Register.
1.7 Direct ...... .
1.8 Index . . . . . . . .
1.9 Processor Status ..
1.10 Program Bank Register
1.11 Program Counter .
1.12 Stack Pointer . . . .
SECTION 2: PIN FUNCTION DESCRIPTION
2.1 Abort . . ..
2.2 Address Bus . . . .
2.3 Bus Enable . . . .
2.4 Data/Address Bus.
2.5 Emulation Status.
2.6 Interrupt Request
2.7 Memory Lock . . .
2.8 Memory/Index Select Status.
2.9 Non-Maskable Interrupt.
2.10 Phase 2 In . . . . .
2.11 Read/Write . . • . .
2.12 Ready . . . . . . .
2.13 Reset . . . . . . .
2.14 Valid Data Address, Valid Program Address
2.15 VDD and VSS
2.16 Vector Pull ....
SECTION 3: ADDRESSING MODES
3.1 Reset and Interrupt Vectors
3.2 Stack . . . . . . . . .
3.3 Direct. . . . . . . .'.
3.4 Program Address Space
3.5 Data Address Space . . . .
W6SC832
1
2
2
2
2
2
3
3
3
3
. 3
4
4
4
10
.11
.11
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.11
.12
. . 12
.12
.12
.12
.12
.13
.13
.13
.14
.14
.14
15
.15
.15
.15
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.15
MARCH 1990