W65C832_1 Datasheet, PDF (46/64 Pages) –

WDC
THE WESTERN DESIGN ~ENTER, INC.
W65C832
ADDRESS MODE
CYCLE VP,ML,VDA,VPA ADDRESS BUS DATA BUS R/W
*3c. Absolute Long (JUMP to
Subroutine Long)-al
1. 1 1 1 1 PBR,PC
2. 1 1 a 1 PBR,PC+1
OpCode
1
New PCL 1
(JSL)
(1 OpCode)
(4 bytes)
3. 1 1 0 1 PBR,PC+2
4. 1 1 1 a a,s
5. 1 1 a a O,S
New PCH
1
PBR
a
IO
1
(7 cycles)
6. 1 1 0 1 PBR,PC+3
7. 1 1 1 0 O,S-l
New PBR 1
PCH
a
8. 1 1 1 0 O,S-2
PCL
0
1. 1 1 1 1 NEW PBR,PC
New OpCode 1
4a. Direct-d
1. 1 1 1 1 PBR,PC
OpCode
1
(BIT,STZ,STY,LDY,
CPY,CPX,STX,LDX,
ORA, AND, EOR,ADC,
STA,LDA,CMP,SBC)
2. 1 1 0 1 PBR,PC+1
(2) 2a. 1 1 a 0 PBR,PC+1
3. 1 1 1 0 O,D+DO
(1) 3a. 1 1 1 0 o,D+DO+1-3
DO
1
IO
1
Byte a 1/0
Bytesl-3 1/0
(18 OpCodes)
(2 bytes)
(3, 4, 5 and 7 cycles)
4b. Direct (R-M-W)-d
(ASL, ROL, LSR, ROR
DEC,INC,TSB,TRB)
1. 1 1 1 1 PBR,PC
2. 1 1 a 1 PBR, PC+1
(2) 2a. 1 1 a 0 PBR,PC+l
OpCode 1
DO
1
IO
1
(6 OpCodes)
3. 1 0 1 0 O,D+DO
Byte 0 1
(2 bytes)
(1) 3a. 1 0 1 0 O,D+DO+1-3 Bytes 1-3 1
(5,6,7,8,11 and
(3) 4. 1 0 0 0 O,D+DO+1 or 3 IO
1
12 cycles)
(1) Sa. 1 0 1 0 O,D+DO+3-1
Bytes 3-1 0
5. 1 0 1 0 O,D+DO
Byte 0 0
5. Accumulator-A
1. 1 1 1 1 PBR, PC
OpCode
1
(ASL,INC,ROL,DEC,LSR,ROR) 2. 1 1 0 0 PBR,PC+l
IO
1
(6 OpCodes)
(1 byte)
( 2 cycles)
6a. Implied i
1. 1 1 1 1 PBR,PC
OpCode 1
(DEY,INY,INX,DEX,NOP,
2. 1 1 0 0 PBR,PC+1
IO
1
XCE,TYA,TAY,TXA,TXS,
TAX,TSX,TCS,TSC,TCD,
TDC,TXY,TYX,CLC,SEC,
CLI,SEI,CLV,CLD,SED)
(25 OpCodes)
(1 byte)
(2 cycles)
*6b. Implied i
1. 1 1 1 1 PBR,PC
OpCode 1
(XBA)
2. 1 1 0 0 PBR,PC+1
IO
1
(1 OpCode)
3. 1 1 0 0 PBR,PC+1
10
1
(1 byte)
(3 cycles)
f6c. Wait-for-Interrupt
ROY
(WAI)
1. 1 1 1 1 1 PBR, PC
OpCode 1
(1 OpCode)
(9)
2. 1 1 0 0 1 PBR,PC+1 10
1
(1 byte)
3. 1 1 0 0 0 PBR,PC+1 10
1
(3 cycles) IRQ, NMI
1. 1 1 1 1 1 PBR,PC+1 IRQ (BRK) 1
MARCH 1990
35