W65C832_1 Datasheet, PDF (27/64 Pages) –

WDC
THE WESTERN DESIGN CENTER, INC.
W65C832
3.5.15 Program Counter Relative-r
This address mode, referred to as Relative Addressing, is used only with
the Branch instructions. If the condition being tested is met, the
second byte of the instruction is added to the Program Counter, which
has been updated to point to the opcode of the next instruction. The
offset is a signed a-bit quantity in the range from -128 to 127. The
Program Bank Register is not affected.
3.5.16 Program Counter Relative Long-rl
This address mode, referred to as Relative Long Addressing, is usd only
with the Unconditional Branch Long instruction (BRL) and the Push
Effective Relative instruction (PER). The second and third bytes of the
instruction are added to the Program Counter, which has been updated to
point to the opcode of the next instruction. With the branch
instruction, the Program Counter is loaded with the result. With the
Push Effective Relative instruction, the result is stored on the stack.
The offset is a signed 16-bit quantity in the range from -32768 to
32767. The Program Bank Register is not affected.
3.5.17 Absolute Indirect-{a)
The second and third bytes of the instruction form an address to a
pointer in Bank O. The Program Counter is loaded with the first and
second bytes at this pointer. With the Jump Long (JML) instruction, the
Program Bank Register is loaded with the third byte of the pointer.
Instruction: 1 opcode 1 addrl 1 addrh 1
Indirect Address = 1 00 I addrh I addrl
New PC = (indirect address)
with JML:
New PC = (indirect address)
New PBR = (indirect address +2)
3.5.18 Direct Indirect-(d)
The second byte of the instruction is added to the Direct Register to
form a pointer to the low-order 16 bits of the effective address. The
Data Bank Register contains the high-order 8 bits of the effective
address.
Instruction: opcode ₁ offset _I
I ^{Direct Register}
+
1 ^offset
00 _I direct address
then:
I 00 I (direct address)
Operand
Address:
+1 DBR 1
I ^---- e f^~f^~e^~c^- t i^-v^-e^-a^~d^-d^-r e^-s^-s^----
3.5.19 Direct Indirect Long-[d]
The second byte of the instruction is added to the Direct Register to
form a pointer to the 24-bit effective address.
Instruction:
then:
Operand
Address:
opcode I offset I
I Direct Register
+
I offset
00 I direct address
(direct address)
MARCH 1990
19