W65C832_1 Datasheet, PDF (47/64 Pages) –

WOC
THE WESTERN DESIGN CENTER, INC.
W65C832
ADDRESS MODE
CYCLE VP,ML,VDA,VPA ADDRESS BUS DATA BUS R/N
#6d. Stop-the-Clock
ROY
(STP)
1. 1 1 1 1 1 PBR,PC
OpCode 1
(1 OpCode)
2. 1 1 0 0 1 PBR,PC+1 10
1
(1 byte)
RES-=l
3. 1 1 0 0 1 PBR,PC+1 10
1
(3 cycles)
RES-=O
1c. 1 1 0 0 1 PBR,PC+1 RES (BRK) 1
RES-=O
lb. 1 1 0 0 1 PBR,PC+1 RES (BRK) 1
RES-=l
1a. 1 1 0 0 1 PBR,PC+1 RES (BRK) 1
(See 21a. Stack
1. 1 1 1 1 1 PBR,PC+1 BEGIN
1
Hardware Interrupt)
7. Direct Indirect
1. 1 1 1 1 PBR,PC
OpCode 1
Indexed-(d),y
2. 1 1 0 1 PBR,PC+1
DO
1
(ORA,AND,EOR,ADC,
(2) 2a. 1 1 0 0 PBR,PC+1
IO
1
STA,LDA,CMP,SBC)
3. 1 1 1 0 O,D+DO
AAL
1
(8 OpCodes)
4. 1 1 1 0 0,D+DO+1
AAH
1
(2 bytes)
(4) 4a. 1 1 0 0 DBR,AAJ,AAL+YL 10
1
(5,6,7,8,9 and 10
5. 1 1 1 0 DBR,AA+Y
Byte 0 1/0
cycles)
(1) Sa. 1 1 1 0 DBR,AA+Y+1-3 Bytesl-3 1/0
8. Direct Indirect
1. 1 1 1 1 PBR,PC
OpCode 1
Indexed Long-(d],y
2. 1 1 0 1 PBR,PC+1
DO
1
(ORA, AND, EOR, ADC,
(2) 2a. 1 1 0 0 PBR,PC+1
10
1
STA, LDA, CMP, SBC)
3. 1 1 1 0 O,D+DO
AAL
1
(8 OpCodes)
4. 1 1 1 0 0,D+DO+1
AAH
1
(2 bytes)
5. 1 1 1 0 0,D+DO+2
AAB
1
(6,7,8,9 and 10
(17) Sa. 1 1 0 0 0,0+DO+2
10
1
cycles)
6. 1 1 1 0 AAB,AA+Y
Byte 0 1/0
(1) 6a. 1 1 1 0 AAB,AA+Y+1-3 Bytesl-3 1/0
9. Direct Indexed
1. 1 1 1 1 PBR,PC
OpCode 1
Indirect-(d,x)
2. 1 1 0 1 PBR,PC+1
DO
1
(ORA,AND,EOR,ADC,
(2) 2a. 1 1 0 0 PBR,PC+1
10
1
STA,LDA,CMP,SBC)
3. 1 1 0 0 PBR,PC+1
10
1
(8 OpCodes)
4. 1 1 1 0 O,D+DO+X
AAL
1
(2 bytes)
5. 1 1 1 0 O,D+DO+X+1 AAH
1
(6,7,8,9 and 10 cycles) 6. 1 1 1 0 DBR,AA
Byte 0 1/0
(1) 6a. 1 1 1 0 DBR,AA+1-3 Bytesl-3 1/0
10a.Direct,X-d,x
1. 1 1 1 1 PBR,PC
OpCode 1
(BIT,STZ,STY,LDY,
2. 1 1 0 1 PBR,PC+1
DO
1
ORA, AND, EOR,ADC,
(2 ) 2a. 1 1 0 0 PBR,PC+1
IO
1
STA,LDA,CMP,SBC)
3. 1 1 0 0 PBR,PC+1
10
1
(11 OpCodes)
4. 1 1 1 0 O,D+DO+X
Byte 0 1/0
(2 bytes)
(1) 4a. 1 1 1 0 0,D+DO+X+1
Bytesl-3 1/0
(4,5,6,7 and 8 cycles)
10b.Direct,X(R-M-W)-d,x
1. 1 1 1 1 PBR,PC
OpCode 1
(ASL,ROL,LSR,ROR,
2. 1 1 0 1 PBR,PC+1
DO
1
DEC,INC)
(2) 2a. 1 1 0 0 PBR,PC+1
10
1
(6 OpCodes)
3. 1 1 0 0 PBR,PC+1
10
1
(2 bytes)
4. 1 0 1 0 O,D+DO+X
Byte 0 1
(6,7,8,9,12 and
(1) 4a. 1 0 1 0 O,D+DO+X+1
Bytesl-3 1
13 cycles)
(3) 5. 1 0 0 0 0,D+DO+X+1
10
1
(1), 6a. 1 0 1 0 O,D+DO+X+1
Bytes 3-1 0
6. 1 0 1 0 O,D+DO+X
Byte 0 0
MARCH 1990
36