MC9328MXS Datasheet, PDF (60/72 Pages) List of Unclassifed Manufacturers – Advance Information

Specifications
Table 28. SDRAM Refresh Timing Parameter Table (Continued)
1.8 ± 0.1 V
3.0 ± 0.3 V
Ref
No.
Parameter
Unit
Minimum
Maximum
Minimum
Maximum
3 SDRAM clock cycle time
11.4
–
10
–
ns
4 Address setup time
3.42
–
3
–
ns
5 Address hold time
2.28
–
2
–
ns
6 Precharge cycle period
t_RP1
–
t_RP1
–
ns
7 Auto precharge command period
t_RC1
–
t_RC1
–
ns
1. t_RP and t_RC = SDRAM clock cycle time. These settings can be found in the i.MX reference manual.
SDCLK
CS
RAS
CAS
WE
ADDR
DQ
DQM
CKE
BA
Figure 49. SDRAM Self-Refresh Cycle Timing Diagram
MC9328MXS Advance Information, Rev. 0
60
Freescale Semiconductor