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MC9328MXS Datasheet, PDF (55/72 Pages) List of Unclassifed Manufacturers – Advance Information
Specifications
3.12 Pulse-Width Modulator
The PWM can be programmed to select one of two clock signals as its source frequency. The selected clock signal
is passed through a divider and a prescaler before being input to the counter. The output is available at the pulse-
width modulator output (PWMO) external pin. Its timing diagram is shown in Figure 45 and the parameters are
listed in Table 25.
System Clock
PWM Output
2a
2b
4a
1
3b
3a
4b
Figure 45. PWM Output Timing Diagram
Table 25. PWM Output Timing Parameter Table
Ref
No.
Parameter
1
System CLK frequency1
2a Clock high time1
2b Clock low time1
3a Clock fall time1
3b Clock rise time1
4a Output delay time1
4b Output setup time1
1. CL of PWMO = 30 pF
1.8 ± 0.1 V
Minimum
0
3.3
7.5
–
–
5.7
5.7
Maximum
87
–
–
5
6.67
–
–
3.0 ± 0.3 V
Minimum
0
5/10
5/10
–
–
5
5
Maximum
100
–
–
5/10
5/10
–
–
Unit
MHz
ns
ns
ns
ns
ns
ns
MC9328MXS Advance Information, Rev. 0
Freescale Semiconductor
55