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EN27LN1G08 Datasheet, PDF (4/41 Pages) Eon Silicon Solution Inc. – 1 Gigabit (128 M x 8), 3.3 V NAND Flash Memory
Table 1. Pin Description
EN27LN1G08
Symbol
I/O0 – I/O7
CLE
ALE
CE#
RE#
WE#
WP#
R/B#
VCC
VSS
NC
Pin Name
Function
The I/O pins are used to input command, address and data, and
Data Inputs/Outputs to output data during read operations. The I/O pins float to Hi-Z
when the chip is deselected or when the outputs are disabled.
The CLE input controls the activating path for commands sent to
Command Latch the command register. When active high, commands are latched
Enable
into the command register through the I/O ports on the rising edge
of the WE# signal.
Address Latch
Enable
The ALE input controls the activating path for address to the
internal address registers. Addresses are latched on the rising
edge of WE# with ALE high.
The CE# input is the device selection control. When the device is
Chip Enable
in the Busy state, CE# high is ignored, and the device does not
return to standby mode.
The RE# input is the serial data-out control, and when active
Read Enable
drives the data onto the I/O bus. Data is valid tREA after the falling
edge of RE# which also increments the internal column address
counter by one.
Write Control
The WE# input controls writes to the I/O port. Commands,
address and data are latched on the rising edge of the WE# pulse.
The WP# pin provides inadvertent program/erase protection
Write Protect
during power transitions. The internal high voltage generator is
reset when the WP# pin is active low.
The R/B# output indicates the status of the device operation.
When low, it indicates that a program, erase or random read
Ready/Busy Output operation is in process and returns to high state upon completion.
It is an open drain output and does not float to Hi-Z condition
when the chip is deselected or when outputs are disabled.
Power Supply
VCC is the power supply for device.
Ground
No Connection
Lead is not internally connected.
Note: Connect all VCC and VSS pins of each device to common power supply outputs. Do not leave VCC
or VSS disconnected.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. C, Issue Date: 2013/10/03