EN27LN1G08 Datasheet, PDF (34/41 Pages) Eon Silicon Solution Inc. – 1 Gigabit (128 M x 8), 3.3 V NAND Flash Memory

EN27LN1G08
Read Status
The device contains a Status Register which may be read to find out whether program or erase
operation is completed, and whether the program or erase operation is completed successfully. After
writing 70h command to the command register, a read cycle outputs the content of the Status Register
to the I/O pins on the falling edge of CE# or RE#, whichever occurs last. This two line control allows the
system to poll the progress of each device in multiple memory connections even when R/B# pins are
common-wired. RE# or CE# does not need to be toggled for updated status. Refer to below table for
specific Status Register definitions. The command register remains in Status Read mode until further
commands are issued to it. Therefore, if the status register is read during a random read cycle, the read
command (00h) should be given before starting read cycles.
Status Register Definition for 70h Command
I/O
Page
Block
Read
Cache
Definition
I/O0
Pass / Fail
Pass / Fail
Not Use
Pass / Fail(N)
Pass: ”0” Fail: ”1”
I/O1
Not Use
(Pass/Fail, OTP)
Not Use
Not Use Pass / Fail(N-1) Pass: ”0” Fail: ”1”
I/O2
Not Use
Not Use
Not Use
Not Use
Don’t cared
I/O3
Not Use
Not Use
Not Use
Not Use
Don’t cared
I/O4
Not Use
Not Use
Not Use
Not Use
Don’t cared
True
I/O5
Ready / Busy Ready / Busy Ready / Busy
Busy: ”0” Ready: ”1”
Ready / Busy
I/O6
Ready / Busy Ready / Busy Ready / Busy Ready / Busy Busy: ”0” Ready: ”1”
I/O7
Write Protect Write Protect Write Protect Write Protect
Protected: ”0”
Not Protected: ”1”
Note:
1. True Ready/Busy represents internal program operation status which is being executed in cache
program mode.
2. I/Os defined ’Not Use’ are recommended to be masked out when Read Status is being executed.
Read ID
The device contains a product identification mode, initiated by writing 90h to the command register,
followed by an address input of 00h. Four read cycles sequentially output the manufacturer code (92h),
and the device code and 3rd, 4th and 5th cycle ID respectively. The command register remains in Read
ID mode until further commands are issued to it.
Read ID Operation
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. C, Issue Date: 2013/10/03