BCM4339XKWBGT Datasheet, PDF (72/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4339 Preliminary Data Sheet
GPIO Interface
GPIO Interface
The following number of general-purpose I/O (GPIO) pins are available on the WLAN section of the BCM4339
that can be used to connect to various external devices:
• FCBGA package – 12 GPIOs
• WLBGA package – 9 GPIOs
• WLCSP package – 16 GPIOs
Upon power up and reset, these pins become tristated. Subsequently, they can be programmed to be either
input or output pins via the GPIO control register. In addition, the GPIO pins can be assigned to various other
functions (see Table 28: “BCM4339 GPIO/SDIO Alternative Signal Functions,” on page 118).
External Coexistence Interface
An external handshake interface is available to enable signaling between the device and an external co-located
wireless device, such as GPS, WiMAX, LTE, or UWB, to manage wireless medium sharing for optimum
performance.
Figure 24 shows the LTE coexistence interface. See Table 28: “BCM4339 GPIO/SDIO Alternative Signal
Functions,” on page 118 for details on multiplexed signals such as the GPIO pins.
See Table 13: “Example of Common Baud Rates,” on page 60 for UART baud rates.
Figure 24: Broadcom GCI or BT-SIG Mode LTE Coexistence Interface for BCM4339
WLAN
BCM4339
GCI
SECI_OUT/BT_TXD
SECI_IN/BT_TXD
LTE\IC
UART_IN
UART_OUT
BTFM
NOTES:
SECI_OUT/BT_TXD and SECI_IN/BT_RXD, on the BCM4339, are multiplexed on the GPIOs.
The 2-wire LTE coexistence interface is intended for future compatibility with the BT SIG2-
wire interface that is being standardized for Core4.1.
ORing to generate ISM_RX_PRIORITY for ERCX_TXCONF or BT_RX_PRIORITY is achieved by
setting the GPIO mask registers appropriately.
Broadcom^®
November 17, 2014 • 4339-DS106-R
Page 71