BCM4339XKWBGT Datasheet, PDF (43/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4339 Preliminary Data Sheet
Bluetooth Power Management Unit
Table 4: Power Control Pin Description (Cont.)
Signal
Mapped to Pin
Type Description
CLK_REQ
BT_CLK_REQ_OUT O
WL_CLK_REQ_OUT
The BCM4339 asserts CLK_REQ when either the Bluetooth
or WLAN block wants the host to turn on the reference clock.
The CLK_REQ polarity is active-high. Add an external 100
kΩ pull-down resistor to ensure the signal is deasserted
when the BCM4339 powers up or resets when VDDIO is
present.
Note: Pad function Control Register is set to 0 for these pins. See “DC Characteristics” on page 122 for more
details.
Figure 6: Startup Signaling Sequence
LPO
VDDIO
HostResetX
Host IOs
unconfigured
Host IOs configured
T₁
BT_GPIO_0
(BT_DEV_WAKE)
BT_REG_ON
T₂
BTH IOs
BTH IOs configured
unconfigured
BT_GPIO_1
(BT_HOST_WAKE)
BT_UART_CTS_N
BT_UART_RTS_N
T₃
Host drives
this low.
BTH device drives this
low indicating
T₄
transport is ready.
CLK_REQ_OUT
T₅
Driven
Pulled
Notes :
x T₁ is the time for the host to settle its IOs after a reset.
x T₂ is the time for the host to drive BT_REG_ON high after the host IOs are configured.
x T₃ is the time for the BTH device to settle its IOs after a reset and the reference clock settling time has elapsed.
x T₄ is the time for the BTH device to drive BT_UART_RTS_N low after the host drives BT_UART_CTS_N low. This assumes
the BTH device has completed initialization.
x T₅ is the time for the BTH device to drive CLK_REQ_OUT high after BT_REG_ON goes high. The CLK_REQ_OUT pin is used
in designs that have an external reference clock source from the host. It is irrelevant on clock-based designs where the
BTH device generates its own reference clock from an external crystal connected to its oscillator circuit.
x The timing diagram assumes that VBAT is present.
Broadcom^®
November 17, 2014 • 4339-DS106-R
Page 42