BCM4339XKWBGT Datasheet, PDF (107/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4339 Preliminary Data Sheet
Signal Descriptions
Table 20: FCFBGA, WLBGA, and WLCSP Signal Descriptions (Cont.)
WLBGA
Ball#
–
–
–
–
–
–
–
FCFBGA
Ball#
B13
C13
A18
B18
B15
B14
B19
WLCSP
Bump#
–
–
–
–
–
–
–
Signal Name
PAD_RDN0
PAD_RDP0
PAD_REFCLKN
PAD_REFCLKP
PAD_TDN0
PAD_TDP0
PCI_PME_L
–
–
–
PAD_TESTP
–
–
–
PAD_TESTN
Type Description
I Receiver differential pair (x1
I ^lane).
I PCIE Differential Clock inputs
I
(negative and positive). 100
MHz differential.
O Transmitter differential pair (x1
O ^lane).
OD PCI power management event
output. Used to request a
change in the device or system
power state. The assertion and
deassertion of this signal is
asynchronous to the PCIe
reference clock. This signal has
an open-drain output structure,
as per the PCI Bus Local Bus
Specification, revision 2.3.
–
PCIe test pin.
–
WLAN SDIO Bus Interface
Note: These signals can also have alternate functionality depending on package and host interface mode.
Refer to Table 28: “BCM4339 GPIO/SDIO Alternative Signal Functions,” on page 118 for additional details.
B11
B11
171
SDIO_CLK
I SDIO clock input.
B12
C11
172
SDIO_CMD
I/O SDIO command line.
B10
C10
173
SDIO_DATA_0
I/O SDIO data line 0.
C10
A11
174
SDIO_DATA_1
I/O SDIO data line 1.
D10
C9
175
SDIO_DATA_2
I/O SDIO data line 2.
C11
B9
176
SDIO_DATA_3
I/O SDIO data line 3.
Broadcom^®
November 17, 2014 • 4339-DS106-R
Page 106