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BCM4339XKWBGT Datasheet, PDF (54/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver | |||
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BCM4339 Preliminary Data Sheet
PCM Interface
Long Frame Sync, Master Mode
Figure 12: PCM Timing Diagram (Long Frame Sync, Master Mode)
PCM_BCLK
PCM_SYNC
1
4
PCM_OUT
Bit 0
Bit 1
5
PCM_IN
Bit 0
Bit 1
2
3
8
HIGH IMPEDANCE
6
7
Table 8: PCM Interface Timing Specifications (Long Frame Sync, Master Mode)
Ref No.
1
2
3
4
5
6
7
8
Characteristics
PCM bit clock frequency
PCM bit clock LOW
PCM bit clock HIGH
PCM_SYNC delay
PCM_OUT delay
PCM_IN setup
PCM_IN hold
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
Minimum
â
41
41
0
0
8
8
0
Typical
â
â
â
â
â
â
â
â
Maximum Unit
12
MHz
â
ns
â
ns
25
ns
25
ns
â
ns
â
ns
25
ns
Broadcom®
November 17, 2014 ⢠4339-DS106-R
Page 53
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