BCM4339XKWBGT Datasheet, PDF (108/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4339 Preliminary Data Sheet
Signal Descriptions
Table 20: FCFBGA, WLBGA, and WLCSP Signal Descriptions (Cont.)
WLBGA FCFBGA WLCSP
Ball#
Ball#
Bump#
Signal Name
Type Description
WLAN GPIO Interface
Note: The GPIO signals can be multiplexed via software and the JTAG_SEL pin to behave as various specific
functions. See Table 28: “BCM4339 GPIO/SDIO Alternative Signal Functions,” on page 118 for additional
details.
B6
D9
189
GPIO_0
C6
C16
190
GPIO_1
D6
C8
191
GPIO_2
B5
A7
192
GPIO_3
C5
B5
193
GPIO_4
D5
A5
194
GPIO_5
C4
C7
195
GPIO_6
D4
B7
196
GPIO_7
I/O Programmable GPIO pins.
I/O Note: These GPIO signals can
I/O ^{be configured by software: as}
I/O ^{either inputs or outputs, to have}
I/O
internal pull-ups or pull-downs
enabled or disabled, and to use
I/O _{either a high or low polarity}
I/O _{upon assertion.}
I/O
H1
E8
197
GPIO_8
I/O
–
–
198
GPIO_9
I/O
–
–
199
GPIO_10
I/O
–
–
200
GPIO_11
I/O
–
–
201
GPIO_12
I/O
–
A3
202
GPIO_14
I/O
–
D8
203
GPIO_13
I/O
–
D6
204
GPIO_15
I/O
JTAG Interface
E5
C6
205
JTAG_SEL
I/O JTAG select. Pull high to select
the JTAG interface. If the JTAG
interface is not used, this pin
may be left floating or
connected to ground.
Note: See Table 28: “BCM4339
GPIO/SDIO Alternative Signal
Functions,” on page 118 for the
JTAG signal pins.
Clocks
H12
P19
138
J12
R19
142
B4
J7
39
H3
W3
56
WRF_XTAL_IN
WRF_XTAL_OUT
LPO_IN
CLK_REQ
I XTAL oscillator input.
O XTAL oscillator output.
I External sleep clock input
(32.768 kHz).
O Reference clock request
(shared by BT and WLAN).
FM Transceiver and SFLASH
–
N3
49
BT_SF_MOSI
–
P3
46
BT_SF_CLK
I/O SFLASH_SI
I/O SFLASH_CLK
Broadcom^®
November 17, 2014 • 4339-DS106-R
Page 107