BCM4339XKWBGT Datasheet, PDF (13/183 Pages) Cypress Semiconductor – Single-Chip 5G WiFi IEEE 802.11ac MAC/Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4339 Preliminary Data Sheet
Table of Contents
Electrostatic Discharge Specifications .................................................................................................. 123
Recommended Operating Conditions and DC Characteristics ........................................................... 124
Section 15: Bluetooth RF Specifications ...................................................................... 126
Section 16: FM Receiver Specifications........................................................................ 133
Section 17: WLAN RF Specifications ............................................................................ 138
Introduction............................................................................................................................................... 138
2.4 GHz Band General RF Specifications............................................................................................... 138
WLAN 2.4 GHz Receiver Performance Specifications .......................................................................... 139
WLAN 2.4 GHz Transmitter Performance Specifications ..................................................................... 143
WLAN 5 GHz Receiver Performance Specifications ............................................................................. 145
WLAN 5 GHz Transmitter Performance Specifications ........................................................................ 149
General Spurious Emissions Specifications ......................................................................................... 150
Section 18: Internal Regulator Electrical Specifications ............................................. 151
Core Buck Switching Regulator.............................................................................................................. 151
3.3V LDO (LDO3P3) .................................................................................................................................. 152
2.5V LDO (BTLDO2P5) ............................................................................................................................. 153
CLDO ......................................................................................................................................................... 154
LNLDO ....................................................................................................................................................... 155
Section 19: System Power Consumption...................................................................... 156
WLAN Current Consumption................................................................................................................... 156
Bluetooth and FM Current Consumption ............................................................................................... 158
Section 20: Interface Timing and AC Characteristics .................................................. 159
SDIO/gSPI Timing ..................................................................................................................................... 159
SDIO Default Mode Timing ................................................................................................................. 159
SDIO High-Speed Mode Timing.......................................................................................................... 161
SDIO Bus Timing Specifications in SDR Modes ................................................................................. 162
Clock Timing ................................................................................................................................ 162
Device Input Timing ..................................................................................................................... 163
Device Output Timing................................................................................................................... 164
SDIO Bus Timing Specifications in DDR50 Mode............................................................................... 166
Data Timing, DDR50 Mode .......................................................................................................... 167
gSPI Signal Timing.............................................................................................................................. 168
PCI Express Interface Parameters .......................................................................................................... 169
JTAG Timing ............................................................................................................................................. 171
Section 21: Power-Up Sequence and Timing ............................................................... 172
Sequencing of Reset and Regulator Control Signals ........................................................................... 172
Description of Control Signals ............................................................................................................. 172
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November 17, 2014 • 4339-DS106-R
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