CS42L52 Datasheet, PDF (50/82 Pages) Cirrus Logic – Low Power, Stereo CODEC w/Headphone & Speaker Amps

CS42L52
6.10 ADC HPF Corner Frequency (Address 0Bh)
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
HPFB_CF1
2
HPFB_CF0
1
HPFA_CF1
0
HPFA_CF0
6.10.1 HPF x Corner Frequency
Sets the corner frequency (-3 dB point) for the internal High-Pass Filter (HPF).
HPFx_CF[1:0]
00
01
10
11
HPF Corner Frequency Setting (Fs=48 kHz)
Normal setting as specified in “ADC Digital Filter Characteristics” on page 14
119 Hz
236 Hz
464 Hz
6.11 Misc. ADC Control (Address 0Ch)
7
ADCB=A
6
DIGMUX
5
DIGSUM1
4
DIGSUM0
3
INV_ADCB
2
1
0
INV_ADCA ADCBMUTE ADCAMUTE
6.11.1 ADC Channel B=A
Configures independent or ganged control of the MIC, PGA, Passthru, ADC and the ALC.
ADCB=A
0
1
Single Volume Control
Disabled
Enabled
6.11.2 Digital MUX
Selects the signal source for the ADC serial port
DIGMUX
0
1
SDOUT Signal Source
ADC
DSP
6.11.3 Digital Sum
Configures a mix/swap of ADCA and ADCB.
DIGSUM[1:0]
00
01
10
11
Serial Output Signal
Left Channel
ADCA
(ADCA + ADCB)/2
(ADCA - ADCB)/2
ADCB
Right Channel
ADCB
(ADCA + ADCB)/2
(ADCA - ADCB)/2
ADCA
6.11.4 Invert ADC Signal Polarity
Configures the polarity of the ADC signal.
INV_ADCx
0
1
ADC Signal Polarity
Not Inverted
Inverted
50
DS680A1