CS42L52 Datasheet, PDF (10/82 Pages) Cirrus Logic – Low Power, Stereo CODEC w/Headphone & Speaker Amps

2. TYPICAL CONNECTION DIAGRAM
CS42L52
+1.8 V to +2.5 V
1 µF
0.1 µF
0.1 µF 0.1 µF 1 µF
+1.8 V to +2.5 V
See Note 5
VD
VA
+VHP
47 kΩ
Line Level Out
Left & Right
Note 1
1 µF ^**
Note 2
1 µF **
* *Use low ESR ceramic capacitors.
Digital Audio
Processor
+1.8 V to +3.3 V
2 kΩ 2 kΩ
0.1 µF
Notes:
1. Recommended values for the default charge pump switching
frequency. The required capacitance follows an inverse
relationship with the charge pump’s switching frequency. When
increasing the switching frequency, the capacitance may
decrease; when lowering the switching frequency, the
capacitance must increase.
2. Larger capacitance reduces the ripple on the internal
amplifier’s supply. This may reduce the distortion at higher
output power levels.
3. Additional bulk capacitance may be added to improve PSRR
at low frequencies.
4. These capacitors serve as a charge reservoir for the internal
switched capacitor ADC modulators. They are only needed
when the PGA (Programmable Gain Amplifier) is bypassed.
5. Series resistance in the path of the power supplies must be
avoided. Any voltage drop on VHP will directly impact the
negative charge pump supply (-VHPFILT) and clip the audio
output.
6. The value of RL, a current-limiting resistor used with electret
condenser microphones, is dictated by the microphone
cartridge.
7. The negative terminal of the MICx inputs connects to the
ground pin of the microphone cartridge. Gain is applied only to
the positive terminal.
FLYP
FLYN
-VHPFILT
MCLK
SCLK
LRCK
SDIN
SDOUT
RESET
SCL
SDA
0.022 µF
HP/LINE_OUTB
51.1 Ω
HP/LINE_OUTA
51.1 Ω
0.022 µF
SPKR/HP
CS42L52
VP
0.1 µF
Headphone Out
Left & Right
+1.6 V to
10 µF ^{+5 V Stereo Speakers}
SPKR_OUTA+
SPKR_OUTA-
VP
0.1 µF
SPKR_OUTB+
SPKR_OUTB-
AIN1A
AIN1B
Note 4
1800 pF _* 100 Ω
1800 pF _*
100 Ω
Left 1
1 µF
100 kΩ
Analog
100 kΩ
Input 1
Right 1
1 µF
AIN2A
AIN2B
1800 pF _* 100 Ω
1800 pF _*
100 Ω
Left 2
1 µF
100 kΩ
Analog
Input 2
100 kΩ
Right 2
1 µF
VL
MIC1-
Note 7
AIN3A/MIC1A
1 µF
Microphone 1
MIC1+
AIN4A/MIC2A
1 µF
100 kΩ
DGND
MICBIAS
0.1 µF
RL _{Note 6}
Mic-Level
Inputs
MIC2+
AIN4B/MIC2B
RL
1 µF
100 kΩ
Microphone 2
MIC2-
AIN3B/MIC1B
Note 7
1 µF
AGND
*
*
150 pF 150 pF
AFILTA
AFILTB
VQ
FILT+
Note 3
1 µF
10 µF
* Capacitors must be C0G or equivalent
Figure 1. Typical Connection Diagram
10
DS680A1