CS42L52 Datasheet, PDF (49/82 Pages) Cirrus Logic – Low Power, Stereo CODEC w/Headphone & Speaker Amps

6.8.2
CS42L52
PGA Input Mapping
Selects one or sums/mixes the analog input signal into the PGA. Each bit of the PGAx_SEL[5:1] word
corresponds to individual channels (i.e. PGAx_SEL1 selects AIN1x, PGAx_SEL2 selects AIN2x, etc.).
PGAxSEL[5:1] Selected Input to PGAx (Examples)
00000
No inputs selected
00001
AIN1x
00010
AIN2x
00100
AIN3x
01000
AIN4x
10000
MICx; for single-ended MIC inputs, use MICxSEL (“MIC x Select” on page 54) to select MIC 1 or MIC 2; for
differential MIC inputs, enable MICxCFG (“MICx Configuration” on page 55)
10001
MICx + AIN1x
10011
MICx + AIN1x + AIN2x
Application:
“Analog Inputs” on page 26
Note: Table does not show all possible combinations.
6.9 Analog & HPF Control (Address 0Ah)
7
HPFB
6
HPFRZB
5
HPFA
4
HPFRZA
3
ANLGSFTB
2
ANLGZCB
1
ANLGSFTA
0
ANLGZCA
6.9.1
6.9.2
6.9.3
6.9.4
ADCx High-Pass Filter
Configures the internal high-pass filter after ADCx.
HPFx
0
1
High Pass Filter Status
Disabled
Enabled
ADCx High-Pass Filter Freeze
Configures the high pass filter’s digital DC subtraction and/or calibration after ADCx.
HPFRZx
0
1
High Pass Filter Digital Subtraction
Continuous DC Subtraction
Frozen DC Subtraction
Ch. x Analog Soft Ramp
Configures an incremental volume ramp from the current level to the new level at the specified rate.
ANLGSFTx
0
1
Ramp Rate:
Volume Changes
Do not occur with a soft ramp
Occur with a soft ramp
1/2 dB every 16 LRCK cycles
Affected Analog Volume Controls
MICxGAIN[4:0] (“MICx Gain” on page 55), PGAxVOL[5:0] (“PGAx Volume”
on page 56), and PASSxVOL[7:0] (“Passthru x Volume” on page 56)
Ch. x Analog Zero Cross
Configures when the signal level changes occur for the analog volume controls.
ANLGZCx
0
1
Volume Changes
Do not occur on a zero cross-
ing
Occur on a zero crossing
Affected Analog Volume Controls
MICxGAIN[4:0] (“MICx Gain” on page 55), PGAxVOL[5:0] (“PGAx Volume”
on page 56), and PASSxVOL[7:0] (“Passthru x Volume” on page 56)
Note: If the signal does not encounter a zero crossing, the requested volume change will occur after a
timeout period of 1024 sample periods (approximately 10.7 ms at 48 kHz sample rate).
DS680A1
49