English
Language : 

CS42L52 Datasheet, PDF (31/82 Pages) Cirrus Logic – Low Power, Stereo CODEC w/Headphone & Speaker Amps
CS42L52
BEEP[1:0] =
'11'
CONTINUOUS BEEP: Beep turns on at a configurable frequency (FREQ) and volume (BPVOL) and remains on
until BEEP is cleared.
BEEP[1:0] =
'10'
BEEP[1:0] =
'01'
MULTI-BEEP: Beep turns on at a configurable frequency (FREQ)
and volume (BPVOL) for the duration of ONTIME and turns off for
the duration of OFFTIME. On and off cycles are repeated until
BEEP is cleared.
SINGLE-BEEP: Beep turns on at a
configurable frequency (FREQ) and
volume (BPVOL) for the duration of
ONTIME. BEEP must be cleared
and set for additional beeps.
BPVOL[4:0]
...
FREQ[3:0]
ONTIME[3:0]
OFFTIME[2:0]
Figure 13. Beep Configuration Options
4.3.2
Referenced Control Register Location
MSTxVOL[7:0]..................... “Master Volume Control: MSTA (Address 20h) & MSTB (Address 21h)” on page 63
PMIXxVOL[6:0] ................... “PCMx Mixer Volume: PCMA (Address 1Ah) & PCMB (Address 1Bh)” on page 58
OFFTIME[2:0] ..................... “Beep Off Time” on page 60
ONTIME[3:0] ....................... “Beep On Time” on page 60
FREQ[3:0] ........................... “Beep Frequency” on page 59
BEEP[1:0]............................ “Beep Configuration” on page 61
BEEPMIXDIS ...................... “Beep Mix Disable” on page 61
BPVOL[4:0] ......................... “Beep Volume” on page 61
Limiter
When enabled, the limiter monitors the digital input signal before the DAC and PWM modulators, detects
when levels exceed the maximum threshold settings and lowers the master volume at a programmable
attack rate below the maximum threshold. When the input signal level falls below the maximum threshold,
the AOUT volume returns to its original level set in the Master Volume Control register at a programmable
release rate. Attack and release rates are affected by the DAC soft ramp/zero cross settings and sample
rate, Fs. Limiter soft ramp and zero cross dependency may be independently enabled/disabled.
Notes:
1. Recommended settings: Best limiting performance may be realized with the fastest attack and
slowest release setting with soft ramp enabled in the control registers. The MIN bits allow the user to
set a threshold slightly below the maximum threshold for hysteresis control - this cushions the sound
as the limiter attacks and releases.
2. The Limiter maintains the output signal between the MIN and MAX thresholds. As the digital input
signal level changes, the level-controlled output may not always be the same but will always fall within
the thresholds.
Referenced Control Register Location
Limiter Controls ................... “Limiter Control 2, Release Rate (Address 28h)” on page 66, “Limiter Attack Rate (Address 29h)” on page 67
Master Volume Control........ “Master Volume Control: MSTA (Address 20h) & MSTB (Address 21h)” on page 63
DS680A1
31