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AM186ED Datasheet, PDF (74/88 Pages) Advanced Micro Devices – High Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers
PRELIMINARY
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL operating ranges
Interrupt Acknowledge Cycle (20 MHz and 25 MHz)
Preliminary
Parameter
20 MHz
25 MHz
No. Symbol
Description
Min
Max
Min
Max Unit
General Timing Requirements
1
tDVCL Data in Setup
2
tCLDX Data in Hold
General Timing Responses
10
10
ns
3
3
ns
3
tCHSV Status Active Delay
0
25
0
20
ns
4
tCLSH Status Inactive Delay
0
25
0
20
ns
7
tCLDV Data Valid Delay
0
25
0
20
ns
8
tCHDX Status Hold Time
0
0
ns
9
tCHLH ALE Active Delay
25
20
ns
10
tLHLL ALE Width
tCLCL – 10 = 40
tCLCL – 10 = 30
ns
11
tCHLL ALE Inactive Delay
25
20
ns
12
tAVLL AD Address Invalid to ALE Low(a)
tCLCH – 2
tCLCH – 2
ns
15
tCLAZ AD Address Float Delay
19
tDXDL DEN Inactive to DT/R Low(a)
20
tCVCTV Control Active Delay 1(b)
tCLAX =0
25
tCLAX = 0
20
ns
0
0
ns
0
25
0
20
ns
T 21
tCVDEX DEN Inactive Delay
22
tCHCTV Control Active Delay 2(c)
0
25
0
20
ns
0
25
0
20
ns
23
tLHAV ALE High to Address Valid
F 31
tCVCTX Control Inactive Delay(b)
20
15
ns
0
25
0
20
ns
68
tCHAV CLKOUTA High to A Address Valid
0
25
0
20
ns
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA, unless otherwise noted. All output test conditions
are with CL =50 pF. For switching tests, VIL=0.45 V and VIH =2.4 V, except at X1 where VIH =VCC – 0.5 V.
A a Testing is performed with equal loading on referenced pins.
b This parameter applies to the INTA1–INTA0 signals.
D R c This parameter applies to the DEN and DT/R signals.
74
Am186ED/EDLV Microcontrollers