AM186ED Datasheet, PDF (59/88 Pages) Advanced Micro Devices – High Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers

PRELIMINARY
Alphabetical Key to Switching Parameter Symbols (continued)
Parameter Symbol
t_CLCSV
t_CLCX
t_CLRX
t_CLDOX
t_CLDV
t_CLDX
t_CLHAV
t_CLRA
t_CLRH
t_CLRL
t_CLSH
t_CLSRY
t_CLTMV
t_COAOB(a)
t_CSHARYL(a)
t_CVCTV
t_CVCTX
t_CVDEX
t_CXCSX
t_DSHDIR(a)
t_DSHDIW
t_DSHDX(a)
t_DSHLH
t_DSLDD(a)
t_DSLDV(a)
t_DVCL
t_DVDSL(a)
D^tDXDL
t_HVCL
t_INVCH
t_INVCL
t_LHAV
t_LHLL
t_LLAX
t_LOCK
t_PLAL
t_RD0W
t_RD1W
t_RESIN
t_RHAV
t_RHDX
t_RHDZ(a)
t_RHLH
No.
Description
16
MCS/PCS Active Delay
105
CLKOUTA Low to CAS Inactive
107
CLKOUTA Low to RAS Inactive
30
Data Hold Time
7
Data Valid Delay
2
Data in Hold
62
HLDA Valid Delay
102
CLKOUTA Low to RAS Active
27
RD Inactive Delay
25
RD Active Delay
4
Status Inactive Delay
48
SRDY Transition Hold Time
55
Timer Output Delay
83
CLKOUTA to CLKOUTB Skew
88
Chip Select to ARDY Low
20
Control Active Delay 1
31
Control Inactive Delay
21
DEN Inactive Delay
17
MCS/PCS Hold from Command Inactive
92
DS High to Data Invalid—Read
F ⁹⁸
DS High to Data Invalid—Write
93
DS High to Data Bus Turn-off Time
41
DS Inactive to ALE Inactive
90
DS Low to Data Driven
A ⁹¹
DS Low to Data Valid
1
Data in Setup
97
Data Valid to DS Low
R¹⁹
DEN Inactive to DT/R Low
58
HOLD Setup
T
53
Peripheral Setup Time
54
DRQ Setup Time
23
ALE High to Address Valid
10
ALE Width
13
AD Address Hold from ALE Inactive
61
Maximum PLL Lock Time
99
PCS Active to ALE Inactive
110
RAS To Column Address Delay Time with 0 Wait States
111
RAS to Column Address Delay Time with 1 or More Wait States
57
RES Setup Time
29
RD Inactive to AD Address Active
59
RD High to Data Hold on AD Bus
94
RD High to Data Bus Turn-off Time
28
RD Inactive to ALE High
Am186ED/EDLV Microcontrollers
59