EPXA4 Datasheet, PDF (28/34 Pages) Altera Corporation – Excalibur Devices

Errata Sheet - Appendix A
Notes:
In all privileged modes this errata exists if the base register is 8 or greater.
This is not restricted to FIQ mode.
Instructions of the form
LDM{<cond>}<addressing_mode> <Rn>,<registers_and_pc}^
operate correctly since these are not LDM to user mode register
instructions. These instructions perform a return from exception.
Example of failing instructions
LDMIA sp,{sp,lr}^
LDMIA r8,{r8-r10}^
Examples that do NOT fail
LDMIA sp,{r8,sp,lr}^ ; Ok, since first register is not the base register
LDMIA r5,{r5,sp,lr}^ ; Ok, since base register is < r8
LDMIA sp,{sp}^
; Ok, since only one register in the list
LDMIA sp,{sp,lr,pc}^ ; Ok, since PC in the list and hence is a return from
; exception instruction and not a load of user mode
; registers.
Implications
This errata only applies to hand crafted assembler code, as the ARM
compiler does not generate such instructions. The use of this instruction is
typically limited to a few places in exception handlers, thus limiting the
scope of this erratum.
Work-around
This instruction is only used by hand crafted assembler code. The ARM
compiler will not generate this instruction. To work-around this errata the
LDM should be split into two separate instructions.
28
Altera Corporation