EPXA4 Datasheet, PDF (20/34 Pages) Altera Corporation – Excalibur Devices

Errata Sheet - Appendix A
A.2.4
Address range cannot include 0xFFFFFFFF—Category 2
A.2.5
Description
There is no way to define a range which includes 0xFFFFFFFF. Ranges
are defined to be exclusive of the upper address, so a range with an upper
address of 0xFFFFFFFF only includes addresses up to 0xFFFFFFFE.
Conditions
All.
Implications
The ability to monitor accesses to this address is seriously reduced.
Workaround
To monitor accesses to 0xFFFFFFFF, the upper address on the range
must be set to 0xFFFFFFFF, with the size mask set to clear bits 1:0 (bits
4:3 of the access type register must be set to b11). This causes the upper
bound of the address range never to match, and so the range has no upper
limit and accesses to 0xFFFFFFFF are monitored correctly.
Implications of workaround
No implications.
This will become part of the ETM specification.
Extra CPRT data traced—Category 2
Description
The ETM specification states that CPRT data (data transfers between ARM
processor registers and coprocessor registers, which are caused by the
instructions MRC, MCR, MRRC, and MCRR) must be traced if and only if
the MonitorCPRT bit is set (bit 1 of register 0x00, the control register).
Under some circumstances CPRT data can be traced when this bit is not
set.
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