EPXA4 Datasheet, PDF (21/34 Pages) Altera Corporation – Excalibur Devices

A.2.6
Errata Sheet - Appendix A
Conditions
This occurs when both of the following are true:
■ ViewData is enabled.
■ Either data value or data address tracing are enabled (bits 3:2 of
register 0x00, the control register).
Implications
Extra CPRT data is traced. Since the number of such transfers is relatively
small, the amount of extra data generated should not be significant.
As there is no requirement for the tools to correctly handle CPRT data
traced when the MonitorCPRT bit is not set, this may result in unexpected
behavior.
Workaround
If this erratum causes an error in the development tools, the user must
always enable coprocessor register transfer tracing.
The tools must be able to handle CPRT data traced even when no CPRT
data was expected.
If this the extra trace is deemed to be confusing to the user, the tools can
ignore CPRT data when CPRT data tracing has been disabled.
Implications of workaround
A small amount of bandwidth may be wasted.
Stall cycles reported on wrong instruction—Category 2
Description
The timestamps or cycle numbers, if captured, might not truly reflect the number
of cycles taken by each instruction. Stall cycles which cause an instruction to take
longer than the minimum time to execute might be reported on an earlier
instruction.
Altera Corporation
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