EPXA4 Datasheet, PDF (27/34 Pages) Altera Corporation – Excalibur Devices

A.3
A.3.1
Errata Sheet - Appendix A
Errata for the ARM922T Processor Core
LDM of user mode registers (ARM9TDMI–8)—Category 2
ARM9 Bug tracking database entry : CPC00_CAM_000013
Summary
Under specific conditions, a LDM to user mode registers will not operate
correctly. These instructions take the form:
LDM{<cond>}<addressing_mode> <Rn>,<registers_without_pc>^
These instructions are only used in system code and not in application
code.
Description
A LDM to user mode registers performs a load to the user mode registers
whilst the processor is in a privileged mode.
Under specific conditions (see below), this instruction will fail to operate
correctly. This results in not all the registers in the register list being
written correctly. It may also cause further failures, dependent on the
construction of the memory system, since the data memory request
signals are driven in an incorrect manner in the failing situation.
Example of failing instruction
LDM sp,{sp,lr}^
Conditions
This errata exists in the following circumstances:
A LDM to user mode registers, where:
1. The base register is register 8 or greater and
2. The base register is the first register (lowest register number) in the
register list and
3. There is more than one register is in the list.
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